Full Parameter Support: Because the final shortcut refinement (Step 3 above) uses A* on detailed maps within each cluster, all your specified parameters are naturally incorporated:
How often does the "slow path" actually trigger? With 32 TLB entries covering 128 KB, Intel claimed a 98% hit rate for typical workloads of the era. That sounds impressive, but a 2% miss rate means a page walk every 50 memory accesses -- still quite frequent. So the 386 overlaps page walks with normal instruction execution wherever possible. A dedicated hardware state machine performs each walk:
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These changes, along with some additional tweaking of bubbletea’s code, reduced time spent in the gc to ~0.5%.